PTL1 listed below discloses a digital PLL (Phase Locked Loop) circuit generating a sampling clock used for digital audio signal processing. This PLL circuit receives a sampling clock (external clock) supplied together with a digital audio signal from the outside, and generates a sampling clock which is in synchronization with this external clock and has a stable frequency. The generated clock is supplied to various types of audio signal processing circuits (DSP, D/A converter, A/D converter, network I/O, and the like), and in such circuits, various types of audio signal processing (signal processing, D/A conversion, A/D conversion, transmission, reception, and the like) are performed in synchronization with the generated clock. Such a PLL circuit is often incorporated together with an audio signal processing circuit in a casing of an audio device which includes the audio signal processing circuit, but can be provided independently from the audio device.